PhD on Design and Optimization of Gabor Filters for Texture Analysis on FPGA

I. Objectives:

The goal of this thesis is to optimize the behaviour of some existing system on chip vision algorithms and also providing new architecture techniques, especially those which serve texture analysis, improving the behaviour of the basic electronic circuits’ parameters.
So the work is related to computer vision (texture analysis) and circuit design.

The main proposed objectives are:

1. Test and compromise different low level models for optimizing the behaviour of specific texture analysis algorithms under our implementation.

2. Study texture analysis and associated hardware designs proposed by researchers to implement texture vision algorithms on hardware basis using the architecture level.

3. Reach an optimal behaviour of hardware based specific computer vision algorithms by implementing them with the aforementioned (in objective 1) circuit tested. Also, components will be chosen to help improving the size, power consumption and speed of the computer vision algorithms (texture analysis) via different steps:
a. To extract the gate level from transistor level design in order to get the behaviour of circuits after being implemented with different components (transistors).
b. Developing the higher level of architecture level modelling from gate level modelling; introduce to provide new and enhanced designs.

4. Produce new hardware-based designs for implementing other complex and competitive computer vision algorithms, (i.e. optical flow algorithms), which mostly suffering from the cost of time consumption models incorporated to design tools.

II. Materials
This investigation will be developed at Departament d’Enginyeria Electronica, Electrica y Automatica (DEEEA) and Departament d’Enginyeria Informàtica i Matemàtiques (DEIM) of Escola Tècnica Superior d’Enginyeria (ETSE) at Universitat Rovira i Virgili (URV), where the student will have the scholarship. Materials to be used will be belonging to those two departments.

III. Work plan
The tasks proposed to achieve the objectives described in Section (I) and their estimated completion time is:

1. (T1) Bibliographic search (3 months)
Do an exhaustive bibliographic research about previous work, regarding the background of transistor level to gate level designs, SOC implementing of texture analysis algorithms and their architectural level designs.

2. (T2) Develop gate level modelling from transistor level modelling (3 months)
The aim of this part is to figure out after making review about previous methodologies; new techniques that can improve the implementation of gate level from transistor level.

3. (T3) Incorporate gate level modelling into simulating tools (3 months)
The task is to test the behaviour of level component in the prospective area we are working with (implementing texture analysis algorithms) and compare it with already existing ones, after model implementation in simulation tools.

4. (T4) Using simulating programs (for architecture level) to prove the theory we reached (5 months).
A thesis goal is to develop the behaviour of an overall system, to achieve that we need to divide them into several units, enhancing the behaviour of a single unit mean, enhancing the overall behaviour.
Via applying architecture level modelling tool so we prove the enhancement before applying to the system.

5. (T5) Developing of aforementioned proposed methodology of SOC (5 months)
The SOC (system on chip) techniques need to be enhanced by improving the low level and gate level circuit components behaviour, which could be enhanced in a better way by implementing them with transistors which has shown better schemes.

6. (T6) Applying obtained structures on different computer vision algorithms (3 months)
Here comes the most important part of the thesis which is implementing different techniques proposed previously on complete computer vision algorithms; specially texture analysis.

7. (T7) Testing and comparing (4 months)
Here we will test and compare both enhanced and new designed architectures with previously existing ones in the total behaviour and some special ones (time consumption as an essential factor of computer vision algorithms) due to the need of our application (texture analysis), using architecture level models in simulation tools

8. (T8) Collecting information and reviewing data (3 months).

9. (T9) Conclusion and future work of the complete thesis (2 months).

10. (T10) Thesis elaboration (5 months).